Recently Intel published Developer Guide – This includes, among other things, a warning about possible compatibility issues for DRM-protected games with upcoming heterogeneous Alder Lake processors. This is just the latest in news from intel regarding their processors
Intel explains that modern DRM protections can include algorithms that affect the processor. The upcoming Alder Lake chips will feature a heterogeneous structure – high-performance Golden Cove cores will be paired with energy-efficient Gracemont cores. To ensure that new chips are recognized and work correctly, the developers of Denuvo, VMProtect and other DRM protection systems will need to make appropriate changes to support new platforms. And with this, problems may arise – the situation is limited to old projects, the authors of which may not have time to release updates or do not want to do it at all.
“If a released or upcoming game uses DRM middleware, you should contact the developer to see if it has support for hybrid architectures in general and for Alder Lake processors in particular.”
from Intel circulation
The Alder Lake family is expected to include several processor subfamilies for different classes of devices – desktops, laptops, ultrabooks and 2-in-1 devices. Based on previous leaks, the 12th Gen Intel Core (Alder Lake-S) desktop processors for the mainstream will be the first to debut.
Desktop “stones” Alder Lake-S will contain up to 8 “large” cores and up to 8 “small” cores – the “8P + 8E” scheme. They will also receive a built-in iGPU in a configuration with 32 computational units (Execution Units, EU). Mobile representatives of Alder Lake – Alder Lake-P – will offer up to 6 “large” cores and up to 8 “small” cores. They will be divided into two series: energy efficient up to 2C + 8A (formerly U-series) and high-performance ones up to 6C + 8A (H-series).
The 12th Gen Intel Core Desktop Processors (Alder Lake-S) are expected to be announced at a special event on October 27 and will begin shipping on November 4. A fresh leaked internal Intel documentation confirms these dates (slide above).
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